Built from the ground up: chips sold × price per chip = revenue, for each product line. Then subtract the three real costs (making the chips, wearing out the factories, running the company) to get profit, profit per share, and a fair share price. Move any slider — everything recalculates instantly.
How to read this page in 20 seconds: pick a scenario → look at the green box (fair value vs today's price ₩2.18M) → open any product line to change its assumptions → watch the waterfall and charts update. Every number here is derived, not typed in. Calibrated to real results: 2025 actuals (revenue ₩97T, profit ₩43T), Q1 2026 actual (₩52.6T revenue, 72% margin), Q2 2026 consensus (₩83.0T).
0 · The physical supply ledger — where the numbers come from
These predictions are anchored to factories, machines and signed plans — things with dates you can verify — not to mood. A fab takes 18-24 months from construction start to volume output, so 2027-28 supply is already fixed by what exists today.
Project
What it makes
Volume from
What it means
M15X (SK, Cheongju)
DRAM / HBM
Open — ramping now
Feeds the 2026-27 shortage; already in today's prices
Cheongju P&T7 (SK, ₩20T)
HBM packaging
Late 2027
Lifts SK's own HBM4E assembly ceiling — funded by the ADR raise
Yongin Y1 (SK)
DRAM (1st of 4 mega-fabs)
From 2027; cluster → 2033
First big new cleanroom — initial volumes only in 2027-28
Indiana (SK, $4B)
HBM packaging (US)
~2028
Assembly next to US customers (CHIPS-funded)
M17 (SK, ₩80T)
NAND
Construction 2027 → ops H1 2029
Lands exactly at the start of the danger window
National ₩800T (Samsung + SK)
4 new fabs
2029-31
Korea plans to DOUBLE memory capacity in 5 years — state-funded, so it gets built even if prices fall
CXMT (China)
Commodity DRAM
Scaling now (3%→8% share)
Pressures commodity prices from 2027; no HBM capability
Nittobo T-glass (JP: 3110)
Low-CTE glass cloth → AI substrates/PCBs
~90% world share; tripling capacity → relief mid-2027
Gates how many AI systems can be built — a floor under scarcity pricing until mid-2027
Mitsui Kinzoku foil (JP: 5706)
HVLP copper foil → CCL → AI boards
One of ~5 non-Chinese suppliers; Malaysia exports +91% YoY (May)
Same story one layer down — physical demand telemetry for our thesis
TSMC COUPE photonics
Co-packaged optics (light replaces copper between chips)
500 → 10K wafers/mo (Q2'26) → 15K (Q4'26) → ≥25K by 2028; yields still 20-50%
Widens the data pipe between chips from 2027 — a demand multiplier for memory, arriving slower than hype (MS: 23K CPO units in 2026 vs 200K once hoped)
TSMC CoWoS
AI-chip packaging
130K → ~200K wafers/mo by 2027
The pipe that pulls HBM demand — allocated years ahead
What the ledger proves — this is why the defaults aren't a mood: (1) 2026-28 tightness is physics. No greenfield fab can reach volume before H2 2028, and every HBM wafer eats ~3× the capacity of a commodity wafer — the shortage is structural, which is why Scenarios A and B share the same 2027-28 chip-growth numbers. (2) The genuine fork is 2029-31, when M17, Yongin 2-3, Samsung's national fabs and CXMT's IPO-funded lines all switch on together — now with ₩800T of state money behind doubling capacity. The materials layer (new): below the chip sits a second set of bottlenecks — T-glass cloth (Nittobo, ~90% share) and advanced copper foil (Mitsui) that every AI substrate and server board needs. These don't stop SK making chips; they cap how many systems the world can assemble per quarter. In a shortage that's margin-supportive (scarcity everywhere = pricing power everywhere, feeding the uncapped LTAs) while trimming the ceiling on unit growth. Their relief arrives mid-2027 — conveniently right when our 2027-28 volume ramp needs the pipe to widen. (3) Photonics is a demand lane, not a threat: TSMC's 30× optical-interconnect ramp (COUPE) un-blocks the wires between chips from 2027 — and faster wires expose the memory bottleneck harder. It also makes optically-pooled memory racks practical, which adds HBM and SOCAMM-class demand on top of local stacks. Three pipe-widening events now converge on 2027: T-glass relief, CoWoS→200K, COUPE ramp. Fact-weighted scenario odds: ~25% A · 50% B · 25% C. The LTA leg just hardened: SK's new contracts have floors but no price caps (unique among the big three — Micron caps at Q2-26 levels) plus 10-30% prepayments. Let the Jul 29 earnings-call LTA detail move the weighting further — not headlines.
1 · Pick a starting world
Each scenario pre-fills every slider. You can then adjust anything.
2 · The four product lines
Revenue for a year = last year's revenue × (1 + more chips sold) × (1 + price change). Tap a line to open its sliders. Showing assumptions for:
3 · Costs, tax, shares, multiple
The company-wide settings that turn revenue into profit per share and a fair price.
4 · From chips to share price — the waterfall
5 · The full path, 2025 → 2030
Solid history, then your assumptions. The dashed line on the price chart is today's price — the gap to the bars is your upside or downside.
Street cross-check (Jul 9): three independent answers to "what is this worth" — this engine's 2028 base case ₩5.84M (bits × prices × costs, 10× multiple) · SimplyWall.st's discounted-cash-flow ₩5.53M (their model, their assumptions) · 37 analysts' 12-month average target ₩3.21M. The first two were built completely separately and land within 6% of each other — that convergence is the anchor. The analyst number isn't wrong, it's answering a different question (12 months out, not 2028) with LOW agreement (spread >15%). Street forward EPS ₩355.65K vs engine 2027 ₩434K — engine ~20% above street, the size of the uncapped-LTA effect the street hasn't fully modelled yet. Debut-day validation: LSEG's analyst poll now puts 2026 revenue at ~$235B ≈ ₩335-355T — squarely on this engine's ₩335T base case. And the ADR adds a live cross-check: SKHY's first US close ($168.01) values the same share at ~₩2.53M — a 16% premium the American market is paying today over the Seoul price this page conservatively uses.
Recentered — Jul 18, 2026: oversubscribed-through-2030 is now the base case
The evidence stack got too tall to keep below the base: Kwak on the record ("demand above supply beyond 2030"), Nvidia's ≥$1T cumulative Blackwell+Rubin orders through 2027, TSMC's CoWoS and N3 sold out with lead times into 2027, ASML's 2027 book effectively full with large 2028 orders already placed, Gerstner positioned "durable through 2029," Baker's 30-40%-of-capex call, MS's memory wall, and Citrini's 28.7-exabyte 2030 supply gap even if every announced fab including China's comes online. Accordingly: the engine's base now runs on the printed-price extrapolator (₩357T '26 / ~₩543T '27), the prior hand-set lines (₩335T / ₩484T) become the conservative floor, and the 2029-31 oversupply wave moves fully to the risk case. The discipline stays: this recentering dies — mechanically, back to the floor — on any of: a first hyperscaler capex cut, the CoWoS supply-demand gap closing below ~5%, or two consecutive quarters of DRAM contract price declines.
Bottoms-up: the Nvidia demand chain — how much SK Hynix likely gets
Ground-up, units × content × price. Anchors: Jensen at the MS roadshow — quarterly revenue "approaching $100B," Q2 guide ~$91B, ≥$1T cumulative Blackwell+Rubin orders through 2027; Rubin carries 288GB HBM4 (8 stacks), Rubin Ultra 512GB+ HBM4E; Goldman sees HBM4 pricing ~doubling into 2027 ($4-5/Gb). Slide the physical inputs; the chain does the rest.
Nvidia's share of world HBM demand (AMD, TPUs, Trainium, ASICs take the rest)
SK Hynix share of HBM (Counterpoint: 58% now; ~70% of Nvidia HBM4 per chatter)
Nvidia's HBM bill, 2027
—
units × GB × 8 × $/Gb
World HBM market implied
—
grossed up for non-Nvidia
SK Hynix gets
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—
Capacity is the binder, and that's the point. The chain above is demand. SK's supply is gated by TSV/MR-MUF packaging (P&T7 arrives late-2027) and was sold out for 2026 before the year began — Kwak's on-record call is that 2027 is the worst supply year in the industry's history. When chain-demand exceeds SK's buildable bits, the surplus doesn't vanish — it shows up as price (the $/Gb slider), which is exactly Scenario B's mechanism. Reconciliation with the engine, stated honestly: at defaults this chain yields ~₩130T of 2027 HBM-stack-only revenue; the engine's HBM line runs hotter because it also carries what the chain excludes — SOCAMM2, custom base-die value, and the price upside if Goldman's $5/Gb prints (move the price slider to 5 and watch the gap close). Two independent paths, one corridor. Cross-check from the demand side: Morgan Stanley's Moore, after meeting Jensen — Nvidia's constraint list starts with "memory."
Printed-price extrapolator — compounding what's actually on the tape
Honesty note (Jul 16): the bottoms-up chains used current price levels; this card compounds the printed percentage sequence forward. On the tape: DRAM contracts +90-95% Q1'26 (TrendForce), +63% Q2, MS/TrendForce Q3 forecast +13-18% — and MS notes memory prices are up ~6× in a year. Not every won reprices instantly: long-term agreements damp the realized blend, and SK shifts bits toward HBM. Both are sliders.
Q4'26 contract move (QoQ — after +90/+63/+15 printed)
2027 average QoQ drift (Citrini: ASPs elevated "for years")
Share of volume repricing each quarter (LTAs damp the rest)
HBM ASP growth 2027 (Goldman: contracts ~double)
Conventional DRAM bit growth (bits shifting to HBM)
HBM bit growth 2027
2026 revenue, printed-price basis
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2027 revenue, extrapolated
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—
EPS and multiples at ₩1.842M
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What compounding the tape shows: at the printed sequence with realistic LTA damping, the engine's hand-set lines (₩335T '26 / ₩484T '27) are conservative, not aggressive — the prints already run ahead of them. If the tape merely holds, the engine is under-clubbed; if the tape mean-reverts, the engine is roughly right. Falsifier: two consecutive quarters of QoQ contract declines before end-2027.
Bottoms-up #2: the TSMC packaging chain — same answer by a different road
TSMC's record Q2 (Jul 16: $39.6B, +36%, above its own guide; CoWoS + N3 sold out into 2027; capex $52-56B at the high end, US expansion accelerating) lets us count HBM demand from the packaging side: every CoWoS wafer exists to marry logic to HBM stacks. Wafers × packages × stacks × GB × price — no Nvidia assumptions anywhere.
AI packages per wafer (blended big-interposer mix)
HBM stacks per package (blended — GPUs 8, switches/small parts 0-2)
GB per stack, 2027 blend (HBM4 48-64GB, 12→16-hi)
HBM $/Gbit
SK share
HBM stacks the world packages, 2027
—
via TSMC's lines (plus small non-TSMC share)
World HBM market implied
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—
SK Hynix gets
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Bottoms-up #4: the ASML transmission — machines today, bits and demand tomorrow
ASML's Q2 (Jul 15): €9.3B sales and 54% margin above guidance, FY26 raised to €43-45B (from €36-40B at the start of the year), Q3 guided €11-12B. The lines that transmit to SK: memory-segment revenue set to grow 75% in 2026 (logic +25%, EUV +45%); ~65 low-NA EUV systems in 2026, +30% capacity for 2027, another +30% under investigation for 2028; 2027 is "close to all the orders we need" — effectively sold out a year out; CFO Dassen: DRAM demand is HBM+DDR volume and nodes using more EUV layers per wafer. Machines convert to revenue 12-18 months after order — this card is 2027-28 made visible today.
EUV systems shipped 2027 (65 × 1.3 = ~85)
Share of EUV going to memory makers (memory +75% says it's rising)
SK's share of memory-maker EUV intake (SK = lead EUV DRAM adopter)
EUV layers per DRAM wafer (1c/1d intensity — rising)
Share of new tools = truly incremental capacity (rest converts existing nodes)
SK EUV intake, 2027
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scanners landing on SK floors
Incremental SK DRAM capacity enabled
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What it feeds
the 45% supply slider
Scenario D's bit-growth ceiling is physically funded here
Three transmission lanes, one subtlety. Lane 1, demand: ASML→TSMC/Intel logic tools become AI accelerators that must attach HBM (logic +25%, EUV +45%). Lane 2, SK's supply: the +75% memory-tool surge is SK/Samsung/Micron's 2027-28 bit capacity being installed now. Lane 3, telemetry: 2027 effectively sold out and 2028 orders already large — the Vahdat prediction row's capex telemetry, printing a year early. The subtlety Dassen handed us: rising EUV layers per wafer means tool spend converts to bits sub-linearly — a chunk of that +75% buys intensity, not volume. Cost-per-bit rises industry-wide, which is a structural floor under pricing: the supply wave of 2027-28 arrives pre-throttled by its own lithography bill. Discipline, enforced by physics and Veldhoven's order book.
Bottoms-up #3: the Physical-AI adder — robots pull memory twice
Jensen's Tokyo week made robots a countable lane. Onboard: each humanoid-class robot carries Jetson-Thor-style unified LPDDR (128GB reference). Cloud: every fleet needs continuous training + simulation — straight HBM. Honest scale-check built in: the onboard lane is tiny in 2028; the training pull and the 2030s curve are the story.
Humanoid/embodied units shipped, 2028 (millions)
Onboard memory per robot (GB)
LPDDR $/Gbit
Cloud training/sim pull (+% on the HBM TAM)
Onboard LPDDR market, 2028
—
small — and SK leads LPDDR anyway
Training-fleet HBM pull
—
on a ~$155B 2027-8 TAM
SK adder (58% share)
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₩T added to the engine's lanes
Scenario D — The Vahdat Curve: AGI → ASI compute singularity
Google's infrastructure chief, on a slide to staff: "Now we must double every 6 months…. the next 1000x in 4-5 years." Run that doubling two more years and you get 10,000×. This card turns the claim into a machine with three organs: a demand rocket (AI usage compounding, accelerating after AGI via agents + recursive self-improvement), an efficiency sponge (better chips + better algorithms absorb part of every doubling — Google's Ironwood is 30× more power-efficient than its first TPU, and Vahdat's stated goal is 1000× capability at "the same cost, same power"), and a factory ceiling (HBM bits can only grow as fast as wafers, TSV and packaging allow). Whatever the sponge can't absorb and the factories can't build doesn't disappear — it becomes price. Memory pricing is violently superelastic in shortage: 2017-18 DRAM doubled on single-digit undersupply.
AGI year (after this, agents + RSI accelerate the curve)
Post-AGI acceleration (× the growth rate — the ASI kicker)
Efficiency sponge (×/year absorbed by silicon + algorithms — Google needs ~4 to hit "same cost")
Industry HBM bit supply growth (%/yr — wafers/TSV/packaging physics)
Inference share on specialized/frozen-class ASICs by 2030 (each carries ~70% of GPU-class memory per token)
Price ceiling (× today's $/Gb before buyers balk / substitute)
Compute demand by 2030
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vs 2026
HBM bits wanted vs buildable, 2030
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SK HBM revenue 2030
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Implied fair value (Scenario D)
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group EPS × 8-10×
Read the machine honestly. Under the plain Vahdat defaults the story is not "SK grows 1000×" — it's rationing: most demanded bits go unserved, factories run flat-out, and price does the rationing work. That is Fortune's "stage two of AI, where the bottlenecks are physical" — power, cooling, build time — which is this site's thesis wearing Google's badge. Note the built-in tension: Vahdat's "same cost, same power" goal is literally a bet against memory pricing — Google wants the efficiency sponge to eat the curve. SK's upside case is the sponge failing to keep pace while Jevons converts every efficiency win into even more demand (the 1000× is Jevons in action — and Kimi K3 just staged the live demo: open-weight frontier model, maker's GPUs exhausted in 48 hours, ~1.1TB of HBM per serving instance; Baker's Jul 17 margin-waterfall thread is the argument in one screenshot). Physical telemetry that must appear if this curve is real: hyperscaler capex through $700B/yr by 2027 (McKinsey: $5.3T of AI datacenter capex by 2030) · tens of GW newly energized per year · ASML EUV book · Ironwood-class TPU volumes (each carries 192GB of HBM — Google's curve is an SK order) · P&T7/M15X on schedule. What kills it: efficiency >4×/yr (demand-in-bits flattens), AGI arriving late into the 2029-31 capacity wave (glut — bear row 7), power/capital ceilings, or stacked-LPDDR/HBF stealing the inference tier (bear row 11).
Scenario D → the master prediction
The singularity scenario doesn't replace the base case — it gets a probability and joins the weighted forecast. The market won't wait for 2030: if the Vahdat curve becomes consensus (visible capex acceleration + 2027 HBM contracts pricing up), the re-rate happens in the forward multiple within months. Default 12% → 15% (Jul 16) → 18% (Jul 18): ASML added a full 2027 order book + large 2028 orders. TSMC (record Q2, CoWoS sold out into 2027, capex at record high-end) and ASML (second guidance raise, EUV ramping) printed the exact telemetry the prediction row demanded — early.
P(Scenario D becomes market consensus by mid-2027)
12-month price if D goes consensus (fwd multiple re-rate + 2027 EPS visibility)
Blended 12-mo E[V]
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Base-case component
₩3.60M
recentered Jul 18 on the extrapolator (was ₩3.26M — now the floor)
Access-flow simulator — what the ADR, ETFs, index funds and tokens are worth
Ground-up build. The earnings engine above answers "what is the business worth." This answers a different question: how much new money can now reach the stock, and what does money alone do to the price? Physics: in inelastic markets (Gabaix-Koijen), $1 of net buying raises market value by roughly $5, because most shares don't trade. Impact = multiplier × net flow ÷ (free-float × market cap).
Index / passive inclusion (SOX, Dec NDX review, MSCI) — CNBC est. $14B
Active US funds rotating in — the Gerstner/Baker channel
Leveraged ETF AUM (SKHX/SKHL — 2× exposure per $)
US retail direct (Robinhood-class)
Tokenized 24/7 (Solana/TON/ETH) — day-1 volume was $0.001B
How to read it: at defaults, ~$29B of reachable new demand × 5 ÷ (75% float × $1.04T) ≈ +19% — almost exactly the 16% premium the ADR printed on day one. The American market has, in one session, roughly pre-paid the flows this simulator expects. Flows change the price path and the multiple; they never change earnings — the two engines of return are independent, which is why this card and the profit engine above are kept separate. Tokens are optionality, not flow: $1.18M of day-one volume rounds to zero, but the rails now exist and never close. Deep structure in one line: the ETFs are a variance amplifier, the tokens a float sponge, and MaaS a valuation-basin option — none of them change a single wafer. The MaaS wildcard sits outside both engines: if Chey's "memory as a service" ever gets a price and a customer, it attacks the 10× multiple ceiling itself — the one input here that's deliberately conservative.